Microcomputers: 32-bit Low Power Microcomputers MN103L Series

32-bit Low Power Microcomputers MN103L Series design engineers Panasonic

32-bit low-power-consumption microcomputer
Delivers smaller area, lower power consumption, and high performance by implementing 32 expanded instruction functions including 32 x 32 high-speed multiplication and multiply-and-accumulate operations based on the microcomputer core with alterable (3 or 4) stage pipeline.

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MN103L Series embedded Panasonic coren/a


The MN103L Series features a simple architecture with a 3-stage pipeline that preserves instruction set compatibility in order to deliver optimal performance in the medium to low speed segment. Furthermore, it is able to deliver both high performance and low power consumption by implementing 32 extended instruction functions that are shared with the CPU’s internal operations, including 32 × 32 high-speed multiplication and multiply-and-accumulate operations.
The series adopts 110-nm flash memory process with low leakage current technology, delivering low power consumption. In addition, it is based on the highreliability technology, such as high-temperature operation for automotive applications, and memory data rewrites (100k times). It can incorporate reset IC, oscillator, high multiplication PLL, and other high-accuracy analog circuits, which are external parts in previous model.

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